• ESD IP development
• ESD design rule development
  
• ESD circuit design
• ESD design verification
  
• ESD pre-silicon performance evaluation
• ESD product troubleshooting
  
• ESD Design Automation and CAD  solutions
  
• Training 

EDA tools for design and verification of IC reliability; ElectroStatic Discharge (ESD) Reliability-physics, technology characterization and optimization; ESD test structure design (at component, library cell and IP module levels) and performance benchmarking; ESD domain valid compact model development for ESD circuit simulation of the technology components - physics, TCAD simulation, circuit simulation, parameter  extraction, model calibration techniques; ESD TLP, HBM, CDM and IEC ESD protection circuit design  for digital, analog, high speed, high voltage, mixed signal and RF  pin applications in CMOS, Bipolar,  BiCMOS;  ESD-RF performance co-design (LNA, PPA), ESD-IC package co-design; ESD design characterization techniques using transmission line pulse (TLP) systems – (100ns pulse width); very fast TLP (1ns pulse width), HBM, CDM and IEC test systems – on wafer or in package;  ESD test system design and measurement chain calibration and data analysis;  ESD product performance test for qualification and  troubleshooting; ESD failure root cause analysis aimed at reducing the product ESD qualification time and fast convergence on identifying the ESD failure mechanisms and the required design improvement.